IEICE ESS Fundamentals Review
Online ISSN : 1882-0875
ISSN-L : 1882-0875
Proposed by VLD
Delay Test Methods For Logic Circuits
Seiji KAJIHARA, Yasuo SATO
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2008 Volume 1 Issue 3 Pages 3_71-3_77

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[in Japanese]
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© 2008 The Institute of Electronics, Information and Communication Engineers
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