Abstract
In this paper, a field programmable gate array (FPGA) was used to create a feed forward neural network trained by particle swarm optimization with a control of velocity (NN-PSOCV). The paper consist of two parts. The first part describes the development of a hardware implementation of NN-PSOCV coded using SystemVerilog programming language. Experimental results demonstrate not only that this NN-PSOCV can be implemented successfully but also that such a hardware implementation of NN-PSOCV achieves better performance than a hardware implementation of the neural network trained by original particle swarm optimization (NN-PSO). However, the hardware implementation of the full program requires a lot of resources such as the programmable logic elements, memory blocks and consequently could be not fit inside a FPGA chip. To address this problem, the second part of this paper proposes a design for an architecture that combines hardware and software. In this architecture, several parts of the training process are performed by software (in this case, the NIOS II processor) while all parts of the testing process are implemented in hardware only. Normally, the neural network is used in both training process and testing process while the particle swarm optimization (PSO) is only used in the training process to train the neural network. Therefore, in the proposed design, the neural network is implemented in hardware but the PSO is implemented in software. Details of each module in the proposed architecture are presented. This paper also shows results of the implementation when tested on a device called DE1-SoC board.
