A Study on Detection Techniques for Minor Defect Patterns Emerging in High-Yield Stages of Semiconductor Fabrication

Abstract

In semiconductor manufacturing, wafer maps are widely used to visualize and analyze the spatial distribution of defective chips for yield improvement. As modern production processes achieve high yields, defect patterns tend to become sparse and localized, making it increasingly difficult to detect subtle and unknown patterns using conventional methods. In this study, we propose a Graph-Based Clustering method for detecting small, localized defect patterns that are not classified into known categories. The proposed method calculates similarity between defect regions based on the structure and spatial features of chip clusters, and forms overlapping clusters to capture potential anomalies. To evaluate the robustness of our approach with respect to defect location, we created 13 different datasets by dividing the wafer into 13 regions and injecting artificial defects with the same characteristics into each region. Experimental results show that the proposed method maintains high F1 scores across all regions, demonstrating robustness to the location of defects. These findings suggest that our method is effective in detecting subtle and unknown defect patterns in high-yield wafer maps, regardless of their position.