1995 Volume 21 Issue 4 Pages 81-88
In order to examine the fusion neutron induced soft-error on memory ICs, two kinds of 1 Mbit CMOS SRAM ICs were irradiated with 14 MeV neutrons. The rate of soft-error upsets on the ICs was measured in situ during neutron irradiation. The number of the soft-errors increased proportionally with neutron fluence. Considering the cell population in the chip, we obtained the neutron susceptibility constant, i.e. bit soft-error cross section of 5~9×10-14cm2 for the 1 Mbit CMOS SRAMs. Also this cross section value agreed roughly with that calculated by computer simulation with a developed Monte Cairo program and the ENDF/B-VI neutron cross section data.