Abstract
The profile design methodology of a blanket SiGeC epitaxial layer for hetero junction bipolar transistor (HBT) is presented. Two important factors, Ge profile and Si cap are designed to minimize the carrier transit time in the intrinsic base region. Concurrently, a BF2 ion implantation and a cobalt silicide process for the extrinsic base were optimized to accommodate the Si cap thickness without relaxing a strain in SiGe layers caused by a reaction between Ge and Co. This design resulted in HBTs with 94-GHz cut-off frequency (fT), 81-GHz maximum oscillation frequency (fmax), and 0.45 dB minimum noise figure at 2 GHz, which could be utilized for consumer electronics products operating within a 2-5 GHz frequency range. The HBT was successfully implemented into 0.25-μm CMOS process with various kinds of passive devices to produce LSIs for consumer wireless electronics.
