IEEJ Transactions on Electronics, Information and Systems
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
<Electrical and Electronic Circuit, LSI>
Study of stacked NOR type MRAM for universal memory
Shoto Tamai, Shigeyoshi Watanabe
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Keywords: Non-volatile memory, MRAM, Spin transistor, stacked NOR structure
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2009 Volume 129 Issue 11 Pages 2091-2092

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Abstract
In this paper stacked NOR type MRAM with vertical spin transistor has been newly proposed. Word line scheme surrounded by vertical spin transistor enable to realize small cell size of 9F2 and fast random access time competitive to DRAM.
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© 2009 by the Institute of Electrical Engineers of Japan
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