Application of High-Speed Modulo Multiplier to Modular Exponentiation

Abstract

Public key cryptosystems such as RSA often require modular exponentiations. Modular exponentiations are performed by repeated modulo multiplications. We have proposed the high-speed modulo multiplier suitable for repeated operations. In this letter, we apply the modulo multiplier to modular exponentiation. Though we require one division at the end of modular exponentiation by use of the modulo multiplier, the whole delay time does not almost increase because the delay time of division is very shorter than that of modular exponentiation. Finally, by using PARHTENON, which is the design system for VLSI, we show the modular exponentiation circuit using our modulo multiplier is very fast as well as the modulo multiplier itself.