DLTS Evaluation of Near-Interface Traps in Ge-MIS Structures Fabricated by ECR-Plasma Techniques

Abstract

A Ge-MIS structure has attracted attention for the candidate of a next generation CMOS device. To date, we have successfully developed Ge-MIS structures with superior interface qualities by ECR (Electron Cyclotron Resonance) plasma techniques. In addition, we have shown that DLTS (Deep Level Transient Spectroscopy) method is useful for evaluating the Ge-MIS structures. In this report, we have evaluated the near-interface traps in GeN_x/Ge structures by DLTS method, and have evaluated the effect of annealing on reducing the traps. The traps observed in the Ge-MIS samples were greatly reduced by 400°C annealing. The origins of the traps are also discussed by comparing with the traps in germanium reported to date.