IEEJ Transactions on Electronics, Information and Systems
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
<Electronic Materials and Devices>
Investigation of Thermal Resistance Reduction of InP-based Double Heterojunction Bipolar Transistors Fabricated by Wafer Bonding
Yuta ShiratoriTakuya HoshiNorihide KashioKenji KurishimaEiji HigurashiHideaki Matsuzaki
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2016 Volume 136 Issue 4 Pages 455-460

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Abstract

Reduction of thermal resistance of InP-based double heterojunction bipolar transistors (DHBTs) is an important issue for preventing degradation of their reliability at high-collector-current-density operation. In order to reduce the thermal resistance, we fabricated InP-based DHBTs on a highly-thermal-conductive SiC substrate with two kinds of wafer bonding technologies (bonding first and bonding last technologies). In the bonding last technology, a thinned InP substrate with DHBTs fabricated in advance was bonded to a SiC substrate. On the other hand, in the bonding first technology, the devices were fabricated after the DHBT epitaxial-layer structure was transferred onto a SiC substrate by wafer bonding. It was found that electrical characteristics of 0.25-µm-emitter DHBTs fabricated by the bonding last technology degraded when the InP substrate was thinned down to 20 µm. In contrast, DHBTs fabricated by the bonding first technology successfully demonstrated marked reduction of their thermal resistance by 28% without any degradation of their electrical characteristics.

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© 2016 by the Institute of Electrical Engineers of Japan
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