2020 Volume 140 Issue 6 Pages 585-591
A new pipelined ADC architecture is proposed for medical applications. We evaluated the proposed ADC architecture using a 180 nm CMOS-process. The designed pipelined ADC achieved 58.24 dB SFDR and 45.14 dB SNDR (ENOB = 7.21 bit) at a sampling frequency of 100 MHz and 2.0 V power supply voltage. In addition, the ADC achieved the highest FOM of 70.62 fJ/conv.- step when the power supply voltage was 1.6 V.
The transactions of the Institute of Electrical Engineers of Japan.C
The Journal of the Institute of Electrical Engineers of Japan