IEEJ Transactions on Electronics, Information and Systems
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
Floorplanning by Improved Simulated Annealing Based on Genetic Algorithm
Seiichi KoakutsuYasuo SugaiHironori Hirata
Author information
JOURNAL FREE ACCESS

1992 Volume 112 Issue 7 Pages 411-416

Details
Abstract
This paper proposes an improved simulated annealing method based on genetic algorithm and applies it to a floorplan design of VLSI. The proposed method can effectively search wide state space for an optimal solution because of the parallel search starting from many initial points and the genetic selection among its paths. Computational experiments show that this method is more powerful to get a better solution than conventional simulated annealing method.
Content from these authors
© The Institute of Electrical Engineers of Japan
Previous article
feedback
Top