Acceleration for Encryption processing Using Reconfigurable Computing

Teruyoshi Yamaguchi; Tomonori Hashiyama; Shigeru Okuma

doi:10.1541/ieejeiss1987.120.12_1781

Teruyoshi Yamaguchi, Tomonori Hashiyama, Shigeru Okuma

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Keywords: Reconfigurable Computing, FPGA

JOURNAL FREE ACCESS

2000 Volume 120 Issue 12 Pages 1781-1785

DOI https://doi.org/10.1541/ieejeiss1987.120.12_1781

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Published: December 01, 2000 Received: March 23, 2000 Available on J-STAGE: December 19, 2008 Accepted: - Advance online publication: - Revised: -
Correction information
Date of correction: December 19, 2008 Reason for correction: - Correction: ABSTRACT Details: Wrong : Fast and flexible encryption technique are required under the rapid spreading internet environment. Encryption technique generally consume the computational power and need specific hardware for practical uses. Specific hardwares can't be modified when the encryption algorithms are improved.
In this paper, we propose the implementation of Reconfigurable Computing (RC) technique for encryption processing. RC is capable of accelerating information processing using dynamic reconfiguration of Field Programmable Gate Arrays (FPGAs). By dividing the target problems into hardware and software processing appropriately, the computation time will become much faster. RC will enable us fast and flexible encryption processing.
However, there are few systens to realize RC as a multi-purpose board. We implemented RC system onto FPGA board.
Right : Fast and flexible encryption technique are required under the rapid spreading internet environment. Encryption technique generally consume the computational power and need specific hardware for practical uses. Specific hardwares can't be modified when the encryption algorithms are improved.
In this paper, we propose the implementation of Reconfigurable Computing (RC) technique for encryption processing. RC is capable of accelerating information processing using dynamic reconfiguration of Field Programmable Gate Arrays (FPGAs). By dividing the target problems into hardware and software processing appropriately, the computation time will become much faster. RC will enable us fast and flexible encryption processing.
However, there are few systens to realize RC as a multi-purpose board. We implemented RC system onto FPGA board.

Date of correction: December 19, 2008 Reason for correction: - Correction: AUTHOR Details: Wrong : Yamaguchi Teruyoshi¹⁾, Hashiyama Tomonori²⁾, Okuma Shigeru¹⁾
Right : Teruyoshi Yamaguchi¹⁾, Tomonori Hashiyama²⁾, Shigeru Okuma¹⁾

Date of correction: December 19, 2008 Reason for correction: - Correction: CITATION Details: Wrong : (6) Michael J. Wirthlin, Brad L. Hutchings, _??_Sequencing Run-Time Reconfigured Hardware with Software_??_ ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pp. 122-128, 1996.
(7) Michael J. Wirthlin, Brad L. Hutchings, _??_A Dynamic Instruction Set Computer_??_ FCCM'95. IEEE Computer Society, 1996.
(8) Milan Vasilko, David Long, ⌈RIFLE-62: A Flexible Environment for Prototyping Dynamically Reconfigurable Systems⌋ Proceedings of 9 th IEEE International Workshop on Rapid System Prototyping (RSP'98), Leuven, Belgium, June 3-5, pp. 130-135. 1998.
(11) Eli Biham and Adi Shamir [Differential Cryptanalysis of the full 16-round DES] CRYPTO'92, LNCS, pp. 494-502, 1993.
(12) Mitsuru MATSUI ⌈On a Structure of Block Ciphers with Provable Security against Differential and Linear Cryptanalysis⌋ IEICE TRANS. FUNDAMENTALS, VOL. E82-A, NO. 1, pp. 117-122, JANUARY 1999.

Right : (6) Michael J. Wirthlin, Brad L. Hutchings, ⌈Sequencing Run-Time Reconfigured Hardware with Software⌋ ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pp. 122-128, 1996.
(7) Michael J. Wirthlin, Brad L. Hutchings, ⌈A Dynamic Instruction Set Computer⌋ FCCM'95. IEEE Computer Society, 1996.
(8) Milan Vasilko, David Long, ⌈RIFLE-62: A Flexible Environment for Prototyping Dynamically Reconfigurable Systems⌋ Proceedings of 9 th IEEE International Workshop on Rapid System Prototyping (RSP'98), Leuven, Belgium, June 3-5, pp. 130-135. 1998.
(11) Eli Biham and Adi Shamir ⌈Differential Cryptanalysis of the full 16-round DES⌋ CRYPTO'92, LNCS, pp. 494-502, 1993.
(12) Mitsuru MATSUI ⌈On a Structure of Block Ciphers with Provable Security against Differential and Linear Cryptanalysis⌋ IEICE TRANS. FUNDAMENTALS, VOL. E82-A, NO. 1, pp. 117-122, JANUARY 1999.

Date of correction: December 19, 2008 Reason for correction: - Correction: PDF FILE Details: -

Abstract

Fast and flexible encryption technique are required under the rapid spreading internet environment. Encryption technique generally consume the computational power and need specific hardware for practical uses. Specific hardwares can't be modified when the encryption algorithms are improved.
In this paper, we propose the implementation of Reconfigurable Computing (RC) technique for encryption processing. RC is capable of accelerating information processing using dynamic reconfiguration of Field Programmable Gate Arrays (FPGAs). By dividing the target problems into hardware and software processing appropriately, the computation time will become much faster. RC will enable us fast and flexible encryption processing.
However, there are few systens to realize RC as a multi-purpose board. We implemented RC system onto FPGA board.

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