Abstract
Schottky-source/drain MOS transistors were fabricated on a highly resistive SOI (Silicon On Insulator) substrate with either chromium or nickel gate electrode. Device isolation was realized by LOCOS process with the consideration for the planarization prior to the gate patterning by lift-off. Source and drain silicidation with titanium disilicide was done adopting the self-alignment process utilizing the gate electrode as a mask, without introducing the covering film on the gate sidewall. Submicron-channel devices with the gate length as shortt as 0.1μm were fabricated with chromium and nickel gate electrodes on the same substrate and satisfactory FET characteristics were observed both for p-type operation with chromium- and nickel- gate devices and for n-type operation with the chromium-gate device. Thus, p-type and n-type devices can be complementarily integrated in the same chip only by changing the gate metal, without the need of well structure in the substrate, This is favorable for higher-density integration.
