Abstract
Petri nets are a mathematical tool well suited for modeling and analysis of Discrete Event Dynamic Systems (DEDS). In this paper, we propose and implement hardware Petri nets on programmable devices. The hardware Petri Nets are generated by firstly modeling the target system with a GUI tool, secondly converting the net description into VHDL codes and finally implementing onto FPGA devices. The hardware Petri nets are useful for discrete event simulation in which they can represent perfectly the natural parallelism of the target system in the circuit level. Moreover, our proposed system is regarded as logic circuit development systems in which we can design desired logic circuits by using Petri nets and implement it directly on FPGA as logic circuits.
