2014 Volume 22 Issue 2 Pages 131-141
In this paper, a processor design method using the Derivative ASIP approach is introduced. The concept of Derivative ASIP is basically to develop an ASIP architecture based on existing GPP processor architecture in order to diminish the design effort and shorten the design time. In this approach, the base processor architecture can be enhanced with more co-processor/instruction extensions quickly since all the required development tools have been available for the base processor. In order to support the Derivative ASIP approach, a new tool called the Co-processor/Instruction Extension Generator Tool is developed. This tool generates complementary files suitable for updating the base processor architecture with co-processor/instruction extensions. A complete set of software development tools consisting of a compiler, assembler, disassembler, linker, debugger, simulator and also hardware implementation for the modified ASIP architecture can be generated automatically by using these complementary files. With our proposed tool, a new co-processor/instruction extension can be designed and added to the base architecture more easily. It contributes to the reduction of the architecture exploration time in the design stage. Derivative ARM ASIP architecture enhanced with instruction extensions for the AES algorithm and a co-processor for the fingerprint navigation algorithm is given to demonstrate the effectiveness of our approach.