IPSJ Transactions on System LSI Design Methodology
Online ISSN : 1882-6687
ISSN-L : 1882-6687
Design and Evaluation of Asymmetric and Symmetric 32-core Architectures on FPGA
Seiya ShirakuniIttetsu TaniguchiHiroyuki Tomiyama
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2019 Volume 12 Pages 42-45


Due to the advances in semiconductor technologies, recent FPGA devices are able to implement a number of CPU cores to realize high-performance embedded systems. This paper presents a case study on design, implementation and evaluation of manycore architectures on an FPGA. Two types of 32-core architectures with different topologies, i.e., asymmetric and symmetric architectures, are designed and implemented on an FPGA, together with an OpenCL-based software framework. The performance of the two architectures is evaluated based on actual measurement using various application programs.

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© 2019 by the Information Processing Society of Japan
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