IPSJ Transactions on System and LSI Design Methodology
Online ISSN : 1882-6687
ISSN-L : 1882-6687
Structured Placement with Topological Regularity Evaluation
Qing DongShigetoshi Nakatake
Author information
JOURNAL FREE ACCESS

2009 Volume 2 Pages 222-238

Details
Abstract

This paper introduces a new concept of regularity-oriented floorplanning and block placement — structured placement, it takes the regularity as a criterion of placement so as to improve the performance. We provide the methods to extract regular structures from a placement representation in linear time, and manage to evaluate these structures by quantifying the regularity as an objective function. We also construct a particular simulated annealing framework, which optimizes placement topology and physical dimension separately and alternately so that it attains a solution balancing the trade-off between regularity and area efficiency. Furthermore, we introduce the symmetry-oriented structured placement to produce symmetrical placement. Experiments show that the resultant placements achieve regularity without increased chip area and wire length, compared to those by existing methods.

Content from these authors
© 2009 by the Information Processing Society of Japan
Previous article Next article
feedback
Top