Transactions of the Institute of Systems, Control and Information Engineers
Online ISSN : 2185-811X
Print ISSN : 1342-5668
ISSN-L : 1342-5668
Scheduling Method of Lot Operating Sequence in Semiconductor Fabrication
Toshihiro UMEDAKayako OMURATakashi FUKUSHIMAMasami KONISHITomonobu YOSHIDA
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1996 Volume 9 Issue 12 Pages 573-581

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Abstract

This paper discusses the lot scheduling method in a semiconductor fabrication, which is a typical repetitive production process. As for the algorithm to schedule lot operating sequence, simulated annealing (SA) method is applied to this scheduling formulated in the combinatorial optimization problem between machines and silicon wafer lots. To accelerate convergence of SA computation keeping up the solution quality, a new technique for reduction of the problem size and improvement of neighborhood creation are developed. Moreover, in our system, material flow in every process is simulated to consider not only the lot inventory but also the future lot arrival.

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