Name : 2001 ITE Annual Convention
Location : [in Japanese]
Date : August 27, 2001 - August 29, 2001
We have developed the MPEG-4 Simple Profile Video decoder using the MAPCA media processor based on the VLIW architecture. By efficient use of SIMD instructions, the DMA engine "Data Streamer", and VLx Co-Processor for variable length decoding of the MAPCA, the decoder software can decode the video stream of CIF (352x288-pixel), 30 fps and 384 kbps with only at 52MHz of the CPU clock.