PROCEEDINGS OF THE ITE ANNUAL CONVENTION
Online ISSN : 2424-2292
Print ISSN : 1343-1846
ISSN-L : 1343-1846
2016
Conference information

Design and Performance Evaluation of a PatchMatch Stereo FPGA Accelerator
*Shunsuke TATSUMIMasanori HARIYAMAKoichi ITOTakafumi AOKI
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CONFERENCE PROCEEDINGS OPEN ACCESS

Pages 22C-1-

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Abstract
PatchMatch Multi-View Stereo (MVS) is a method generating a depth map from multi-view images. The drawback of PatchMatch MVS is its large computational amount. We presents an FPGA accelerator for PatchMatch MVS for high-speed and low-power; this is designed using OpenCL that allows users a high-level description like C/C++ for efficient design.
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© 2016 The Institute of Image Information and Television Engineers
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