A Numerical Analysis of a CMOS Image Sensor with a Simple Fixed-Pattern-Noise-Reduction Technology

Abstract

A 1/3-inch 640×480-pixel CMOS image sensor was developed using a simple fixed-pattern-noise-reduction technology with a five-transistor pixel circuit and a low input-voltage I-V converter. In this report, we show the effectiveness of a low input-voltage I-V converter with a current-mirror circuit in improving the amplification ratio and linearity of a pixel circuit. The dependence of the pixel signal characteristics on the parameters of the pixel transistors was also analyzed. In a five-transistor pixel circuit, the threshold voltage of the X-Y addressing transistor affects the amplitude and level of the readout pulse. This report also contains analysis of the mechanism of the X-Y addressing transistor, illustrating the concept behind the selection of the threshold voltage.