MPEG-2 All-Format Video Decoder Using VLIW-Based Media Processor

Abstract

An all-format decoder (AFD), which is an MPEG-2 MP@HL video decoder, has been developed for digital television. It uses a media accelerated processor for consumer appliances 2000 (MAPCA2000), which is based on the very-long-instruction-word architecture. The AFD decodes an MPEG-2 video stream using some of the discrete cosine transform coefficients in the input stream. The algorithm it uses to decode the stream reduces the amount of memory and processor power required. By efficiently using single-instruction multiple-data instructions, a direct-memory-access engine, and a co-processor for variable-length decoding, the AFD can decode 1080i-format video streams in real time using a standard MAPCA2000 running on a 300-MHz CPU with a 100-MHz external-memory bus clock and only 3.5 MB of external memory.