A CMOS Image Sensor with noiseless Column-parallel ADC.

Abstract

We have developed a 1/4" 10bit digital output VGA CMOS image sensor with a column-parallel ADC architecture. It operates with single 3.3V power supply and has 60mW power consumption at 30frame/s. A column-to-column fixed pattern noise in the column-parallel ADC architecture is reduced by the comparator structure of the double inverting amplifier with double clamp circuits. By using the comparator clamp circuit as a part of the correlated double sampling circuit, no linear amplifiers in the column signal path are required, and so amplifier noise is reduced. The total image sensor signal to noise ratio 57dB is obtained.