Abstract
In this paper, we present the new row-parallel search and address encoding architecture, and circuit implementations for high speed 3-D range-fin ding using the light-section method. We propose the new integration tech nique for fast integration, the row-parallel embedded binary search tree and address encoding for high-speed detection and readout of activated pixel addresses, and a mask circuit for masking operation of a detected pixel. We achieve 14.3k range maps/s operation at a system clock of 180MHz and the maximum range error and the standard deviation of range error is 0.997mm and 0.258mm respectively at a target distance of 400mm.
