ITE Technical Report
Online ISSN : 2424-1970
Print ISSN : 1342-6893
ISSN-L : 1342-6893
34.48
Session ID : IST2010-67
Conference information
A Column-parallel Cyclic ADC with 4bit fronted gain stage for low-noise wide dynamic range CMOS Image Sensors
Sung-Ho SuhTaishi TakasawaMin-woong SeoSinya ItohSatoshi AoyamaShoji Kawahito
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Abstract
Characteristics of a column-parallel Cyclic analog-to-converter (ADC) with 4bit fronted gain stage for low-noise wide dynamic range CMOS image sensors are investigated. The signal amplification and output range expansion are obtained by the 4bit fronted gain stage which consist of a switched capacitor (SC) amplifier, 4bit single slope ADC and 4bit digital-to-analog converter (DAC). The front-end gain stage has a function of folding, and high gain=16, a low-noise level while maintaining a wide dynamic range is realized. A prototype 1M-pixel CMOS image sensor is implemented with a 0.18-um 1P4M CMOS image sensor technology. The dynamic range and noise level are 74.2[dB] and 6[e^-], respectively.
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© 2010 The Institute of Image Information and Television Engineers
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