An 18M-pixel CMOS Image Sensor Using 12-bit Column-Parallel Single-Slope ADCs with Operation-Period-Reduced Time-to-Digital Converters

Yoshio HAGIHARA; Yusaku KOYAMA; Takanori TANAKA; Atsuko KUME; Yosuke KUSANO; Mai ARITA; Masashi SAITO; Yoshihisa OKADA

doi:10.11485/itetr.40.12.0_37

40.12 Information Sensing Technologies(IST)

Session ID : IST2016-16

DOI https://doi.org/10.11485/itetr.40.12.0_37

Conference information

Host: The Institute of Image Information and Television Engineers

An 18M-pixel CMOS Image Sensor Using 12-bit Column-Parallel Single-Slope ADCs with Operation-Period-Reduced Time-to-Digital Converters

Yoshio HAGIHARA, Yusaku KOYAMA, Takanori TANAKA, Atsuko KUME, Yosuke KUSANO, Mai ARITA, Masashi SAITO, Yoshihisa OKADA

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Keywords: single-slope (SS) ADC, time-to-digital converter (TDC), operation-period-reduced

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Abstract

In this paper, we propose a 12-bit column-parallel single-slope (SS) ADC with operation-period-reduced time-to-digital converter (TDC) and the application of these ADCs to an 18M-pixel CMOS image sensor. The developed image sensor achieves 1.728-GHz operation with the same power consumption as the conventional SS ADC at 108 MHz by reducing the operating period of the TDC. The ADCs on the 18M-pixel CMOS image sensor consume 0.58 W even at a 60-fps readout.

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