時空間処理のための140GOPS列並列演算器を有する積層型1ms-高速ビジョンチップ

小林 正嗣; 山崎 智裕; 片山 博誠; 上原 修二; 能勢 敦; 志田 さやか; 小田原 正起; 高宮 健一; 久松 康秋; 松本 静徳; 宮下 令央; 渡辺 義浩; 伊澤 崇; 村松 良徳; 石川 正俊

doi:10.11485/itetr.41.10.0_3

41.10 Information Sensing Technologies(IST)

Session ID : IST2017-9

DOI https://doi.org/10.11485/itetr.41.10.0_3

Conference information

Host: Information Sensing Technologies(IST)

Name : Information Sensing Technologies(IST)

Date : March 10, 2017

A 1ms High-Speed Vision Chip with 3D-Stacked 140GOPS Column-Parallel PEs for Spatio-Temporal Image Processing

*Masatsugu Kobayashi, Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Atsushi Nose, Sayaka Shida, Masaki Odahara, Kenichi Takamiya, Yasuaki Hisamatsu, Shizunori Matsumoto, Leo Miyashita, Yoshihiro Watanabe, Takashi Izawa, Yoshinori Muramatsu, Masatoshi Ishikawa

Author information

*Masatsugu Kobayashi [Japan]
Sony Semiconductor Solutions Corporation [Japan]
Tomohiro Yamazaki [Japan]
Sony Semiconductor Solutions Corporation [Japan]
Hironobu Katayama [Japan]
Sony Semiconductor Solutions Corporation [Japan]
Shuji Uehara [Japan]
Sony Semiconductor Solutions Corporation [Japan]
Atsushi Nose
Sony Semiconductor Solutions Corporation [Japan]
Sayaka Shida [Japan]
Sony Semiconductor Solutions Corporation [Japan]
Masaki Odahara [Japan]
Sony LSI Design Inc. [Japan]
Kenichi Takamiya [Japan]
Sony LSI Design Inc. [Japan]
Yasuaki Hisamatsu [Japan]
Sony LSI Design Inc. [Japan]
Shizunori Matsumoto [Japan]
Sony LSI Design Inc. [Japan]
Leo Miyashita [Japan]
University of Tokyo [Japan]
Yoshihiro Watanabe [Japan]
University of Tokyo [Japan]
Takashi Izawa [Japan]
Sony Semiconductor Solutions Corporation [Japan]
Yoshinori Muramatsu [Japan]
Sony Semiconductor Solutions Corporation [Japan]
Masatoshi Ishikawa [Japan]
University of Tokyo [Japan]

Keywords: Column-Parallel process units, Visual Feed Back, 3D-stacked CMOS image sensor, high speed vision chip, 1000fps

CONFERENCE PROCEEDINGS FREE ACCESS

Details

Abstract

We have developed a 1/3.2-inch 1.27Mpixel 500fps (0.31Mpixel 1000fps 2×2 binning) vision chip with 3D-stacked CMOS image sensor. This sensor achieves high resolution and high sensitivity by back-illuminated stacked pixels. In addition, the sensor achieves high speed operation “each pixels” and “each frames” by two kinds of column-parallel processing units. With this technology, it is possible to provide “Visual Feed Back” to the control device with an accuracy that cannot be identified (in units of 1ms) by human eyes.

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