ITE Technical Report
Online ISSN : 2424-1970
Print ISSN : 1342-6893
ISSN-L : 1342-6893
41.32 Information Sensing Technologies(IST)
Session ID : IST2017-57
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Region Control Oriented Stacked CMOS Image Sensor with Array-Parallel ADC Architecture
*Takahito YamauchiTomohiro TakahashiYuichi KajiYasunori TsukudaShinichiro FutamiKatsuhiko HanzawaPing Wah WongFrederick BradyPhil HoldenThomas AyersKyohei MizutaSusumu OhkiKeiji TataniTakashi NaganoHayato WakabayashiYoshikazu Nitta
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Abstract
A 4.1Mpix 280fps stacked CMOS image sensor with array-parallel ADC architecture is developed for region control applications. The combination of an active reset scheme and frame correlated double sampling (CDS) operation cancels Vth variation of pixel amplifier transistors and kTC noise. The sensor utilizes a floating diffusion (FD) based back-illuminated (BI) global shutter (GS) pixel with 2.4e-rms readout noise. An intelligent sensor system with face detection and high resolution region-of-interest (ROI) output is demonstrated with significantly low data bandwidth and low ADC power dissipation by utilizing a flexible area access function.
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© 2017 The Institute of Image Information and Television Engineers
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