Record of Joint Conference of Electrical and Electronics Engineers in Kyushu
Record of 2005 Joint Conference of Electrical and Electronics Engineers in Kyushu
Session ID : 09-1A-05
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Host: Joint Conference of Electrical and Electronics Engineers in Kyushu

A FPGA-based hardware implementation of the multiple communication system using the chaotic inter-spike interval dynamics
Toru Hasegawa, Tomohiro Takao, Tsuyoki Yoshimoto, Akihiro Yamaguchi
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© 2005 Committee of Joint Conference of Electrical and Electronics Engineers in Kyushu
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