Record of 2007 Joint Conference of Electrical and Electronics Engineers in Kyushu
Session ID : 11-2P-03
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Host: Joint Conference of Electrical and Electronics Engineers in Kyushu
An Implementation Technique for Variable Grain Logic Cell to Reduce Delay and Configuration Memories
Kazunori Matsuyama, Motoki Amagasaki, Ryoichi Yamaguchi, Masahiro Iida, Toshinori Sueyoshi
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Article 1st page
