Record of Joint Conference of Electrical and Electronics Engineers in Kyushu
Record of 2009 Joint Conference of Electrical and Electronics Engineers in Kyushu
Session ID : 02-1A-06
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Host: Joint Conference of Electrical and Electronics Engineers in Kyushu

Floorplanning with I/O Boundary Constraints in VLSI Layout Design
Masataka Kawatsu, Sandrine Gadenne, Hua-An Zhao
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[in Japanese]
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© 2009 Committee of Joint Conference of Electrical and Electronics Engineers in Kyushu
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