Record of 2010 Joint Conference of Electrical and Electronics Engineers in Kyushu
Session ID : 10-2A-04
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Host: Joint Conference of Electrical and Electronics Engineers in Kyushu
Design of low-power and high-speed DAC with pseudo Fibonacci sequence in 0.18μm CMOS process
Kazuya Hokazono, Ryouta Kubokawa, Abhishek Tomar, Ramesh Pokharel, Haruichi Kanaya, Keiji Yoshida
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