TEION KOGAKU (Journal of Cryogenics and Superconductivity Society of Japan)
Online ISSN : 1880-0408
Print ISSN : 0389-2441
ISSN-L : 0389-2441
Josephson Digital LSI Technology
Shuichi TAHARAShuichi NAGASAWAHideaki NUMATAShinichi YOROZUYoshihito HASHIMOTO
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1996 Volume 31 Issue 11 Pages 594-600

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Abstract
Superconductive LSI with Josephson junctions have features such as low-power dissipation and high switching speed. This paper describes the recent progress of Josephson digital LSI technology. Firstly, we reviewed our developed 4-Kbit RAM with vortex transitional memory cells to illustrate the operation of the superconductive LSI using Josephson junctions. We developed a fabrication process tehnology for the 4-Kbit RAM. In the 4-Kbit RAM, a suitable moat structure was designed to reduce the influence of the trapped magnetic flux. The RAM is characterized by 380 ps access time, 99.8% bit yield, and 9.5mW power dissipation. Furthermore, we discuss GHz testing which is one of the most significant issues concerning Josephson digital LSIs. Finally, we discuss a future application for the Josephson digital LSI. The Josephson digital LSI has a special operating feature at a clock frequency of several GHz. We propose a superconductive ring pipelined network between processor elements at such a high-speed application. The prototype chip was designed and estimated to be able to operate at approximately 10GHz. A clock with a frequency of several GHz clock is an impontant feature for future Josephson digital LSI technology.
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© Cryogenic Association of Japan
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