Journal of the Japan Institute of Power Electronics
Online ISSN : 1884-3239
Print ISSN : 1348-8538
ISSN-L : 1348-8538
Applicable to a Three-phase n-level Inverter Reduction of the General Switching Loss Reduction Method
Takumi SonoToshiji KatoKaoru Inoue
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2016 Volume 42 Pages 130-136

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Abstract

A multi-level inverter has advantages in high blocking voltages and reduced harmonics. However, it needs more complex technical challenges in the utilization of redundant switching vectors as its level is increased.This paper proposes a general space-vector (SV) modulation method for the optimal reduction of the switching losses in three-phase PWM inverter of an arbitrary n-level type. The proposed method consists of two steps. One is the general principle for generation of the SV map for an arbitrary n-level type. The other is the optimal selection of the SV pattern which minimizes the switching losses considering the three-phase currents based on the two-phase modulation method. Simulated examples controlled according to the proposed method are shown for some different levels.

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© 2016 The Japan Institute of Power Electronics
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