Fabrication Technologies for Package Parts of Josephson Chips

Micro-pin Fabrication and Bonding

Abstract

Fabrication and bonding technologies for micro-pins (diameter 90 μm) used in the packaging of Josephson chips are reported. Packaging technologies for Josephson chips are essential for satisfying the conditions of high packaging density, usability at low temperature and heat cycles. Toward this purpose, specially designed micro-pins are studied. The pin array is formed by electrodischarge machining (EDM) techniques using a metal sheet mask with precise hole diameters as the electrode from Pt sheet affixed to a Cu block. The pin heads are then inserted into the pin-carrier and glued using an adhesive. The pin-carrier is made from a Si wafer, having precise hole diameters fabricated by EDM corresponding to the pin array. Following the etching of the Cu block to personalize the Pt pins, solder is evaporated onto the bottom surfaces of the pin array. The pin array is subsequently bonded en masse employing the solder reflow operation on the substrate solder pads. Finally, the pin-carrier is removed in acetone. Through these processes, fabrication and bonding technologies for micro-pins used in high-packaging density (pitch 300 μm) apllications can be realized with high-precision and high-reliability.