Mirror Polishing of Silicon Wafers (2nd Report)

The Effect of Temperature Distribution of Si Wafers on their Flatness and Stock Removal Rate

Abstract

This paper explains how the temperature of Si wafers during polishing affects their flatness after polishing. During the polishing operation, the temperature distribution of the wafer was measured using thermistor sensors (0.1 K accuracy) attached to the wafer opposite the surface being polished. It is made clear that this distribution is affected by the pouring method and temperature of the polishing reagent. The temperature near the center of the Si wafer during polishing is about 1.0 K higher than that of the surrounding area. As a result, chemical action is activated, increasing the stock removal rate at the center, and the polishing wafer is out of flat by 0.6-1.2μm in a concave direction.