2010 JSEE Annual Conference (58)
Session ID : 8-223
Conference information
Host: Japanese Society for Engineering Education, Tohoku Society for Engineering Education
Name : Annual Conference of Japanese Society for Engineering Education
Number : 2010
Location : [in Japanese]
Date : August 20, 2010 - August 22, 2010
8-223 HDL Logic Circuit Design Training on an FPGA Starter Board
Details
Article 1st page
