Proceedings of the Optimization Symposium
Online ISSN : 2433-1295
2012.10
Session ID : 1203
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1203 Topology Optimization for Power Semiconductor Devices
Katsuya NOMURATsuyoshi ISHIKAWAAtsushi KAWAMOTOTadayoshi MATSUMORITakahide SUGIYAMATsuguo KONDOH
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Abstract
Recently, the growing demand for hybrid vehicle(HV) and electric vehicle(EV) is increasing the competition for development of power semiconductor devices, which is indispensable for HV and EV. Therefore, topology optimization for power semiconductor devices design has been studied; however, there is no research satisfying both of low calculation cost and high calculation accuracy. In this study, we used the adjoint method and the appropriate physical models to solve this problem. We demonstrated the improvement in the trade-off between on-resistance and breakdown voltage of a p-n junction diode by topology optimization.
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© 2012 The Japan Society of Mechanical Engineers
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