Design of the Convolution Layer Using HDL and Evaluation of Latency Using a Camera Signal

Abstract

The Convolutional Neural Network (CNN) is applied to several applications and is expected to the embedded systems such as IoT devices. However, these systems need high calculation costs and high power consumption. Because in general, those system requires the using GPUs and its hard to implement on the small embedded system. In recent years, FPGAs have been applied to the auto-control systems, defect inspection systems, and the security systems. Especially applying for the image processing technologies for industrial products were adapted. Hardware acceleration is one of the techniques to improve processing speed and is often used for image processing. Our work has designed the hardware acceleration for CNN and compared it to software processing. The hardware-based modules of CNN were implemented on FPGA and tested. This paper shows the details architecture, was designed in our research, and the verification results of the real-time processing.