Low-Latency Inference of FPGA-Based ANFIS for Real-Time Control Systems

Abstract

This paper designs and evaluates a low-latency Adaptive Neuro-Fuzzy Inference System (ANFIS) implemented on an FPGA for real-time control systems. With the recent advancement of AI-IoT, there is an increasing demand for low-latency and low-power AI inference on edge devices. We designed a trained ANFIS model using C language for CPU and Verilog HDL for FPGA, and compared their classification performance, processing speed, and power consumption using the Iris and Balance Scale datasets. For the Iris dataset, the FPGA implementation achieved approximately 1.7 times faster processing speed and significantly lower power consumption compared to the CPU. Furthermore, our experiments with the Balance Scale dataset revealed implementation challenges related to the precision limits of 16-bit floating-point arithmetic, which can lead to instability in inference. The results demonstrate that FPGA-based ANFIS is effective for applications requiring real-time control and edge AI.