2024 Volume 15 Issue 2 Pages 324-334
Semiconductor technology has been growing rapidly. In particular, mobile devices, which include smartphones and wearable devices, are widely used in daily life. In addition, the mobile devices perform digital image processing, audio processing, and artificial intelligence (AI) processing, etc., which are known collectively as multimedia processing, and require massive data calculation. Therefore, mobile devices must have high performance, programmability, and versatility on a single core. In this paper, a content addressable memory-based massive-parallel SIMD matrix core (CAMX) is proposed as a mobile device accelerator for high performance, programmability, and versatility. The CAMX can process repeated arithmetic and table-lookup coding operations in a massively parallel form. In addition, the authenticity of digital images is becoming more important. Hence, watermarking technology using a max-plus algebra-based morphological wavelet transform (MMT) is used as an authentication technique for mobile devices. In this paper, the CAMX is implemented and the MMT watermarking technology is simulated through a lookup-table. The results show that the CAMX can process 128 × 128 pixel images in parallel, where decomposition is 2,364 clock cycles and reconstruction is 1,236 clock cycles. In addition, the processing time for the CAMX and an ARM core, which is commonly used in mobile devices, are compared. The CAMX achieves higher MMT watermarking performance at operating frequencies of 800 kHz or higher as compared to the ARM core with NEON.