Oyo Buturi
Online ISSN : 2188-2290
Print ISSN : 0369-8009
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New technology for evaluating reliability of flash memory
Shigetoshi SUGAWA
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2009 Volume 78 Issue 9 Pages 897-901

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Abstract

A large-array test circuit that is able to precisely and quickly evaluate the reliability of large capacity flash memory has been developed. The test circuit consists of over 80,000 devices per shot and over 5,000,000 devices per wafer. Each device corresponds to a actual cell of flash memory. The test circuit is able to analyze stress-induced leakage currents with 10-16 A resolution and voltage fluctuations with 1mV resolution in a short time of approximately 50 or 100 seconds. In this paper, the large-array test circuit technique and examples of measurement results are presented.

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© 2009 The Japan Society of Applied Physics
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