2016 Volume 85 Issue 2 Pages 132-136
‘Pore engineering’, which is a method for controlling the memory performance of conducting-bridge random access memory (CBRAM) by considering the polycrystalline oxide memory layer as a nano-porous body, is proposed. This method enables the control of important memory parameters by providing appropriate solvents to the pores, and by controlling the pore size and physical and chemical properties of the pore surface. In this paper, it was confirmed that forming and set voltages were achieved, and their dispersions were reduced by supplying solvents with a high solubility of Cu to the HfO2 layer of the Cu/HfO2/Pt structures. Not only was there a reduction of the switching voltages and their dispersion but also an improvement in both the immunity against external disturbances and cycling endurance was achieved by supplying an ionic liquid.
