Advanced CMOS transistor architecture

- From FinFET, GAA nanosheet to 3D stacked transistors

Abstract

CMOS scaling has advanced from conventional planar transistors to FinFET, Gate-All-Around (GAA) nanosheets, and emerging 3D stacked transistor architectures. FinFETs introduced a 3D fin structure with improved electrostatic control, enabling gate length reduction and performance gains down to the 3nm node. GAA nanosheet transistors further improve gate control by fully surrounding nanosheets, offering better power, performance, and density for the 2nm node and beyond. Looking forward, 3D stacked transistors propose vertically stacking nFET and pFET devices, unlocking new levels of integration. Together, these architectural innovations sustain CMOS scaling and enable continued progress in advanced semiconductor technologies for the next decades.