Abstract
In recent years, the development of very large and ultralarge scale integrated technologies has shrunk the lateral dimensions of semiconductor devices to the submicron level. This reduction in device size has necessitated a device characterization technique that can provide information on two-dimensional junction distribution at nanometer resolutions. Electron holography, based on a transmission electron microscope equipped with a field emission source and an electron biprism, provides a way of directly mapping the electrostatic potential distribution of p-n junctions at nanometer resolutions. In this report, we present the recent results of using off-axis electron holography technique to quantitatively map and characterize electrostatic potential distributions of Si/Si implanted p-n junctions with low doping levels in both model junction samples and transistors.This work was supported in part by the Active Nano-Characterization and Technology Project, using Special Coordination Funds from the Ministry of Education, Culture, Sports, Science and Technology of the Japanese government.
