Motion Image Compression Circuit using the Silicon Retina as Active Sensor

Motoki Amagasaki; Fuminori Kobayashi; Minoru Watanabe; Tetsuya Yagi

doi:10.11499/sicep.2002.0.408.0

SICE Annual Conference 2002

DOI https://doi.org/10.11499/sicep.2002.0.408.0

Conference information

Host: The Society of Instrument and Control Engineers

Co-host: IEEE/Industiral Electronic Society, IEEE/Robotics and Automation Society, IEEE/Control System Society

Motion Image Compression Circuit using the Silicon Retina as Active Sensor

Motoki Amagasaki, Fuminori Kobayashi, Minoru Watanabe, Tetsuya Yagi

Author information

Keywords: JPEG, DCT, charge-mode operation

CONFERENCE PROCEEDINGS FREE ACCESS

Pages 408

Details

Abstract

Silicon retina, modeling a biological architecture, can implement parallel operations with low power. To implement a compact, fast image-processing system, this paper describes a circuit with FPGA (Field Programmable Gate Array) and silicon retina combined together. Circuit optimization by DCT (Discrete Cosine Transform) is proposed.

Corresponding author

Register with J-STAGE for free!