Development of SVHS VTR System for EDTV-II

Abstract

SVHS digital signal processing VTR system decoding 2nd generation EDTV (EDTV-II) has been developed. This system consists of 4 LSIs, luminance signal processor, chrominance singal processor, apalog interface LSI, and EDTV-II signal processor. EDTV-II signal processor contarins 3-dimensional YC separator/noise reducer, Horizontal-High (HH) component decoder, and identity signal detector. In this paper, the system constitution and signal processing algorithm of HH decoder and identity signal detector are described.