Reports of the Technical Conference of the Institute of Image Electronics Engineers of Japan
Online ISSN : 2758-9218
Print ISSN : 0285-3957
Reports of the 257th Technical Conference of the Institute of Image Electronics Engineers of Japan
Session ID : 11-01-08
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Reports of the 257th Technical Conference of the Institute of Image Electronics Engineers of Japan
Proposal of a fast arithmetic coder performing renormalization together with register flush
*Ikuro UENOFumitaka ONO
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Abstract
To terminate the code of arithmetic coding, redundancy of at most two bits will be caused by flushing the register. If an arithmetic coder can be flushed at every renormalization timing without redundancy, it can be more fast and simple since it does not need to keep the address and the augend of the probability interval. We propose a fast arithmetic coder which produces no redundancy when the coder is flushed, by dividing the final interval into the plural areas corresponding to the combination of necessary succeeding symbols. However, its coding efficiency can be lowered since it allows the mismatch of the probability and the corresponding area of the probability interval. We report the fundamental performance of our proposed arithmetic coder.
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© 2011 by The Institute of Image Electronics Engineers of Japan
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