Particle swarm optimization (PSO) is a powerful method for dealing with the optimization of nonlinear applications such as network optimization, power system optimization and so on. The PSO algorithms enable a higher signal processing speed than conventional approaches and dedicated digital signal processor (DSP) in various application fields. However, the software implementation of PSO is extremely time-consuming when the numbers of iterations and particles become large. In some applications such as smart engine control, nuclear reactor control and so on, real-time control on the order of μm-ms is required, which is extremely difficult to achieve in an embedded system. To realize ultrahigh-speed signal processing of the aforementioned applications, several possible approaches of PSO hardware implementation are discussed and investigated in this paper. A novel hardware architecture for the PSO algorithm is employed to overcome the above difficulties. In this research, the proposed hardware architecture is implemented into a field-programmable gate array (FPGA) to evaluate its performance. The proposed hardware architecture employs two features, which are a serial architecture with two-level pipelines and an adaptive generic particle calculation block (AGPCB). It can not only achieve much faster performance than the conventional approaches but also minimize the chip cost simultaneously. The related research achievements prove that the proposed hardware architecture can greatly reduce the calculation time while achieving high efficiency. In addition, the proposed approach has compatibility with various PSO algorithms to meet the requirements of different nonlinear applications.
In this paper we consider a pseudo-formal linearization that transforms a given nonlinear system into a pseudolinear system. The given nonlinear system is linearized piecewise by the formal linearization method based on a Taylor expansion considering up to higher-order terms, and then each piecewise linearized system is smoothly united into a single linearized system by an automatic choosing function. The error bounds of this pseudo-formal linearization indicate that the accuracy of the approximation is improved when the domain is reasonably divided and as the order of the polynomials increases. A nonlinear observer and a nonlinear filter are also synthesized as applications of the pseudo-formal linearization. The high validity of this method is verified through numerical examples.
In Session 10, we showed that the telegrapher's equations can be extended using the Riccati differential equation and that a new circuit element can be obtained. In Session 11, we showed that the Dirac equation, which is used in quantum theory, can be expressed as the extended telegrapher's equations and that circuit theory can be applied to the Dirac equation. In this session, we demonstrate that a new circuit element can be obtained by applying reactive power to the Dirac equation. In this case, energy given by Einstein's well-known formula E = mc2 should be considered for the discussion on an ordinary world that does not require the theory of relativity.