Proceedings of JIEP Annual Meeting
The 17th JIEP Annual Meeting
Session ID : 13A-13
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Material of Semi-Additive Process for Fine-Pattern Wiring Boards
*Koji Morita
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CONFERENCE PROCEEDINGS FREE ACCESS

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Abstract
The substrates of semiconductor packages require high wiring density and the highest reliability of all printed wiring boards (PWBs). The interstitial via holes (IVHs) structure can be made with the build-up technology using laser or photo process. Therefore it is one of the major concerns to accomplish the wiring density. But various kinds of electronic equipment are required to be downsized more and more. So the materials are required high peel strength on smooth surface and high interconnection reliability in various connecting patterns.We newly developed adhesive sheet for the build up process of PWBs. This material shows excellent adhesion toward the plating copper formed on its surface. Moreover the interface between the adhesive layer and the copper layer has extremely smooth surface corresponding to the shiny side of copper foil. Resins were modified in order to progress the stretch and the strength of the material and consequently obtain the characteristic adhesion. We believe that the formation of smooth surface copper become great advantage for the fine wiring of PWBs and the skin effect related to high frequency. In practice, this material shows the good insulation and high heat resistance of heat cycle test by the characteristic adhesion. The adhesive sheet consists of halogen-free materials, therefore, is expected to be environment-conscious product.
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© 2003 by The Japan Institute of Electronics Packaging
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